As known in the art, through-substrate vias (referred to herein as TSVs), which are commonly referred to as through-silicon vias in the case of silicon substrates, are vertical electrical connections that extend the full thickness of the IC die from one of the electrically conductive levels formed on the topside semiconductor surface of the IC die (e.g., contact level or one of the back end of the line (BEOL) metal interconnect levels) to its bottomside surface. Such IC die are referred to herein as “TSV die.” The vertical electrical paths are significantly shortened relative to conventional wire bonding technology, generally leading to significantly faster device operation. In one arrangement, the TSVs terminate on the bottomside of the TSV die as protruding TSV tips, such as protruding a distance of 5 to 15 μm from the bottomside substrate (e.g., silicon) surface. To form the protruding tips, the TSV die are commonly thinned while in wafer form to expose the TSVs and to form the tips, such as to a die thickness of 25 to 100 μm, using a process generally including backgrinding. The TSV die can be bonded face-up or face-down, and can be bonded to from both of its sides to enable formation of stacked die devices.
In die areas having TSVs, there can be no active devices because TSVs extend the full thickness of the TSV die. TSVs on the TSV die are generally arranged in a plurality of separate TSV arrays that cover a relatively small percentage of the TSV die area, and thus TSVs collectively do not approach uniformly covering the area of the TSV die. The TSVs within the TSV arrays are typically regularly spaced having a fixed pitch. Regions beyond the TSV arrays, or TSV-free regions, result in an irregular bottomside topography caused by the protruding TSV tips being elevated, such as protruding 5 to 15 μms, relative to the TSV-free regions having a consistent lowest elevation.
The TSV tips may include a metal cap thereon, such as a cap including a nickel comprising layer, that can function as an inter-metallic compound (IMC) barrier to overlying Sn-based solder in the case of solder mediated joints to a workpiece (e.g., a package substrate or another die or a die stack) to avoid, or at least delay, the consumption of the inner metal core (e.g., copper) of the TSV from forming an IMC which can lead to cracking of the outer dielectric sleeve of the TSV, and resulting failures (e.g., leakage or shorts) on the TSV die. The metal cap can significantly increase the height of the protruding TSV tips relative to the TSV-free regions.
Thermo-compression (TC) bonding is a common IC assembly method that involves the use of pressure (e.g., 40 to 80 N/cm2) applied by a bond head and a significant temperature (e.g., a temperature high enough to melt solder, such as 230 to 300° C.) to join two materials by interdiffusion across the boundary of the materials. The TC bonding process relies on pressure to push pillars or other bonding features on the topside surface of TSV die or a TSV wafer against opposing pads on a substrate, wafer or another die that are to be bonded, and to heat and melt the solder. During TC bonding of a thin (e.g., <100 μm thick) TSV die having bottomside TSV tips to a substrate (e.g., package substrate, die, or die stack) in which the topside of the TSV die is bonded to pads on a substrate, the TC bond head comes in direct contact with the protruding TSVs that protrude far above the surrounding TSV-free regions, effectively resulting in non-uniformly distributed pressure applied to the bonds formed on the topside of the die.